MOSFET is a common semiconductor device. Currently as the performance of MOSFET devices is gradually increased, more and more integrated circuits may be implemented by using MOSFET, in addition to the traditional digital signal processing such as microprocessor, microcontroller, etc. However, regardless of which application situations, the noise of the MOSFET device will bring a lot of manufacture inconvenience and deterioration to the performance.
The noise of the MOSFET mainly have three types: (1) channel thermal noise, which is derived from the channel resistance, and involves the working state and the temperature, but is independent of frequency (white noise); (2) induced gate noise, which is derived from the channel thermal noise, and it is coupled to the gate through the gate capacitive, such that the gate voltage varies along with the change of channel potential distribution (thermal noise), i.e. gate noise induced by channel thermal noise; (3) 1/f noise, which is mainly derived from the interface state of Si—SiO2 interface (because it sometimes traps, and sometimes releases the carriers in the channel, and thus making channel currents go up and down). It is a low-frequency noise with a noise voltage that falls off steadily into the higher frequencies, which is why it is called 1/f noise.
In order to ensure product quality, the MOSFET devices typically require noise testing. However, wafer level device noise test requires a very high measuring accuracy of the equipment and test environmental requirements. Any slight noise will cause unstable or erroneous test results, thus providing inaccurate information for the circuit designers. A conventional test protocol is to establish an expensive shield space to reduce noise, but it cannot be completely isolate the device from outside interference.
Therefore, a test structure with low cost and ease of operation, which can be used to test the real noise of the MOSFET device without interference of the outside noise, is still of a great demand.